No, tak jsem to nejak zkoumal, ten popis existuje. Po nejakou dobu musi byt behem startu na A31 uroven 1 a pak jen uroven 0. Coz resi ten tranzistor invertovanim signalu reset3.

A31# goes on pin number U4
http://www.intel.com/design/Pentium...ts/29864306.pdf
Page 67


quote:
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Power-On Configuration Pins"

Disable Hyperthreading Technology" A31

Asserting this signal during RESET# will select the corresponding option
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H_CPURST# is AB25

http://www.intel.co.jp/design/intar...gd/25131901.pdf

Its on a few pages, but RESET does this:


quote:
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RESET#

Asserting the RESET# signal resets the processor to a known state and invalidates its internal caches without writing back any of their contents. For a power-on Reset, RESET# must stay active for at least one millisecond after VCC and BCLK have reached their proper specifications. On observing active RESET#, all sysem bus agents will deassert their outputs within two clocks. RESET# must not be kept asserted for more than 10 ms while PWRGOOD is asserted.

A number of bus signals are sampled at the active-to-inactive transition of RESET# for power on configuration. These configuration options are descrived in the Section 6.1

This signal does not have on-die terminiation and must be terminated on the system board.
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Hmm, jestli to funguje se zjisti jen vyzkousenim. Samozrejme jeste musi byt BIOS, ktery u dane desky umozni nastaveni HT.

Jinak vetsina info je na www.vr-zone.com, ve foru nejaky Ristar o tom pise, ale rekl bych, ze spis mlzi, jenom keci ...

Nejlepsi bude pockat na test noveho Powerleapu pro P4, kdyz to s nim pojede, tak neni problem. Ale clovek z Powerleapu (tvaril se tak) tvrdil, ze to pojede jen z P4 3.04G. Pry je to jen uprava pro starsi MB, ktere puvodne HT nepodporovali.